FPGA-based Hardware-in-the-Loop Testing for Smart Grid and Electric Motor Drive Applications

Abstract

This presentation will highlight OPAL-RT’s latest FPGA-based electrical hardware solver for real-time simulation of high-frequency grid and drive converters, for smart grid and electric motor drive applications. As the development of FPGA-based systems is typically for advanced users, OPAL-RT’s
solution is oriented towards non-flashing technology using a generic and optimized approach to solve power electronics circuit for these applications. As motor controller’s algorithms become more complex, so do tests and development of new control strategies. This presentation will also highlight the latest developments of OPAL-RT efforts to work efficiently with these new challenges and to improve time to market of grid converters and electric motor drive systems. OPAL-RT turnkey system for ECU testing and rapid motor prototyping is in line with this philosophy as the user interface allows easy modification of motor or drive topology without requiring knowledge in FPGA or reprogramming the FPGA. The objective of this approach is to enable hardware-in-the-loop (HIL) testing with submicrosecond time steps.

Speaker Biographies

Sébastien Cense – eFPGASIM Team Leader

Sebastien Cense received his B.S. and M.S. degrees in micro electronics from the ISEN Engineering School in Lille, France in 2010. His final paper on FPGA embedded command of polyphase motor using space vector algorithm was conducted at the Arts et Metiers Paris Tech in collaboration with OPAL-RT. He joined OPAL-RT in October 2010 where he has been engaged in developing FPGA application solutions such as rapid control prototyping and on-board motor simulation. Sebastien also contributed to a number of technical presentations.

François Berthelot – Business Unit Manager – Eastern North America

François Berthelot received his B.S. in mechanical engineering from the École Polytechnique de Montréal, Canada in 2008. He received his post-graduate diploma in electrical engineering from the École de technologie supérieure (ETS) de Montréal, Canada in 2013. His final project was related to FPGA motor model integration with controller in the loop. He joined OPAL-RT in 2008 and has been involved in worldwide technical support, R&D and sales activities for the last 10 years with the company.